Appel à contribution : Session spéciale « Hardware accelerators for Deep Neural Networks » dans la revue Electronics.

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Date limite de contribution : 15 Juillet 2021


Over the last few years, the demand for computing power has been steadily increasing. This trend has also been supported by the successful adoption of machine learning (ML) and, in particular, deep learning (DL) architectures, such as deep neural networks (DNNs) in a plethora of application domains, with significant improvements in terms of accuracy compared to traditional solutions based on custom algorithms. This growing demand puts pressure on the design and development of power and area efficient computing architectures on different scales, from high-performance computing (HPC) down to mobile and wearable computing.

This Special Issue intends to collect contributions on the advance of methodologies and technologies for the design, evaluation, and optimization of hardware accelerators representing the current solution, to support the diverse computing scenarios in which deep neural networks are exploited.

Topics of interest include, but are not limited to:

  • Novel architecture designs of hardware accelerators;
  • Interconnects for hardware accelerators;
  • Dataflow mapping techniques;
  • Tools for modeling, simulation, and synthesis of hardware accelerators;
  • Hardware/software co-design;
  • Metrics and benchmarks for performance evaluation;
  • Approaches for energy efficiency.

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